The present invention relates to an equalization circuit to be used in a demodulation circuit for demodulating a multilevel digital modulation signal, and more particularly to an automatic equalization circuit of the type that equalization characteristics, i.e., frequency characteristics, are automatically set by using a training signal, and to a receiver circuit (demodulation circuit) using such an automatic equalization circuit.
It is desired in every and each transmission system including a multilevel digital transmission system that waveform distortions, echoes and the like be as small as possible. It is known that an automatic equalizer is used in a demodulation circuit (receiver circuit) for demodulating a modulation signal of a multilevel digital modulation type. Examples of using an automatic equalizer are disclosed, for example, in Shahid U. H. Qureshi, “Adaptive Equalization”, Proceedings of the IEEE, Vol. 73, No. 9, September 1985, pages 1349 and 1355, Kazuo Murano and Shigeyuki Unakami, “Digital Signal Processing in Information/Communication”, Shokodo, Nov. 25, 1987, page 57, FIG. 2.24, and The Institute of Electronics and Communication Engineers, “Application of Digital Signal Processing”, The Institute of Electronics and Communication Engineers of Japan, May 20, 1981, page 150, FIG. 6.1 and page 171, FIG. 6.21.
An example of an automatic equalization circuit used in a conventional demodulation circuit of such a multilevel digital modulation type will be described with reference to the block diagram of FIG. 11 showing the overall structure of a demodulation circuit (receiver circuit) of a multilevel digital modulation type.
In the demodulation circuit shown in FIG. 11, a received modulated signal having a carrier frequency of f is inputted to an analog BPF (band-pass filter) 1 whereat the bandwidth of the received modulated signal is limited. Then, at an AGC (automatic gain control) circuit 2, the level of the received signal is changed to a predetermined level irrespective of its signal level when received. This signal is then inputted to an A/D converter (analog to digital converter) 3 to be converted into a digital signal and supplied to a reception power calculator 4 and multipliers 5.
At the reception power calculator 4, the level of the received signal is calculated in accordance with the digital signal outputted from the A/D converter 3, and fed back to a control input of the AGC circuit 2. A digital signal having a predetermined level can therefore be inputted to the A/D converter 3.
The digital signal inputted to the multipliers 5 is multiplied by a carrier signal having a frequency of f and supplied from a sine-wave generator 7 to obtain an in-phase component (I component) signal and a quadrature component (Q component) signal.
More specifically, the multipliers 5 perform quadrature demodulation by generating the in-phase component (I component) signal through multiplication by a sine-wave signal cos(ωt) directly supplied from the sine wave generator 7 and the quadrature component (Q component) signal through multiplication by a carrier signal sin(ωt) obtained by shifting the sine-wave signal cos(ωt) from the sine wave generator 7 by π/2 at a phase shifter 6, where ω is 2πf.
The waveforms of the in-phase component (I component) signal and quadrature component (Q component) signal outputted from the multipliers 5 are waveform shaped by roll-off filters (ROFs) 8. The shaped signals outputted from ROFs 8 are supplied to an equalizer 9. The equalization characteristics of the equalizer 9 can be set by setting tap coefficient values to the equalizer 9.
Data signals Ia and Qa equalized by the equalizer 9 are inputted to an identifier 10 which identifies a transmission point on the transmission side. This identification result is outputted as data signals Id and Qd which are converted into a serial signal at a P/S converter (parallel-in serial-out shift register) 11 to obtain demodulated data.
The equalizer 9 equalizes a received signal to eliminate the influence of waveform distortions, echoes and the like received on a transmission path. To this end, predetermined equalization characteristics are set beforehand to the equalizer 9.
The equalizer 9 is generally designed to carry out an operation with a complex number comprised of an in-phase component and quadrature component. An example of the equalizer 9 will be described with reference to FIG. 5.
The equalizer 9 shown in FIG. 5 has two adders 201 and four transversal filters 202.
Each of the transversal filters 202 of the equalizer 9 is generally constituted by (N-1) delay elements 2021, N multipliers 2022 and a summing unit 2023 as shown in FIG. 6. The equalization characteristics of the equalizer 9 can be set by tap coefficients C1 to CN to be set to the multipliers 2022.
Assuming that tap coefficient vectors of the transversal filters 202 are represented by Cbi and Cbq and that input vectors set in a time domain for respective delay times of the delay elements 2021 are represented by Ir and Qr, then the relation between an input signal complex number (Ir+ j-Qr) and the tap coefficient vectors Cbi and Cbq is given by:(Ir+j·Qr)·(Cbi+j·Cbq)=(Ir·Cbi−Qr·Cbq)+j·(Ir·Cbq+Qr·Cbi) 
The values of output signals Ia and Qa can therefore be given by the following equations by using the input signal vectors Ir and Qr and tap coefficient vectors Cbi and Cbq:Ia=Ir·Cbi−Qr·Cbq Qa=Ir·Cbq+Qr·Cbi 
By changing the tap coefficient vectors Cbi and Cbq, the transmission characteristics, i.e., characteristics between the input signals Ir and Qr and output signals Ia and Qa can be changed.
The equalization characteristics of an equalization circuit are set in the following manner. A signal called a training signal having a predetermined format is preset as a standard or reference signal. Prior to a transmission start of a data signal, this training signal is transmitted from the transmission apparatus side to the reception apparatus side. By using the training signal, the equalization characteristics are set and thereafter, the data signal is transmitted.
Generally, the training signal is formed by generating signal points of a two-level modulate point pair in a baseband having a PN pattern such as M-sequence and then quadrature modulating them.
Two signal points of the two-level modulate point pair are selected from signal points on the constellation plane for data signals, the two signal points having the same power as the average power of data signals, or two signal points not used by data signals are newly generated. Also in the latter case, the two signal points having the same power as the average power of data signals are selected.
An example of the former case will be described by taking as an example a 16 QAM system. As shown in FIG. 8, two signal points A (+3, +1) and B(−3, −1) are used as the training signal. In this case, the average power of data signals is ((12+12)+2×(12+32)+(32+32))/4=10, assuming that each signal point is transmitted at the same probability. This average power of 10 is equal to the average power (32+12)=10 of A and B.
An example of the latter case will be described by taking as an example a 16 QAM system. As shown in FIG. 9, two new signal points C (+√10, 0) and D(−√10, 0) are used to form the training signal. In this case, since the average power of data signals is 10, the amplitude of C and D is set to √10 to make the average power equal to 10.
In the latter case, the modulation circuit requires a specific circuit for the training signal and not for the data signal, whereas in the former case using the same signal points as those of data signals, the circuit scale can be reduced. For this reason, the former case is often adopted.
When the training signal is received, the reception apparatus side compares the received training signal with a training signal generated by a training signal generator 18. In accordance with a difference therebetween, the tap coefficients of the equalizer 9 are sequentially changed. When the difference becomes smallest, the equalizer 9 enters the condition capable of equalizing distortions on the transmission path.
For this operation, as shown in FIG. 11, a training signal synchronization detector 12, switches 16-3′ and adders 17-1 are provided.
The training signal synchronization detector 12 may be a correlator. A PN pattern of M-sequence is generally used for the training signal. A part of this PN pattern is used as the coefficients of the correlator, and the output signals Ir and Qr of the roll-off filters 8 are inputted to the correlator to calculate a correlation value. When the patterns are coincident, a large correlation value is outputted, whereas when there is no correlation, i.e., when the patterns are not coincident, a small correlation value is outputted. An output of the correlator is inputted to a comparator (not shown) to compare it with a predetermined threshold value. When the correlation value exceeds the threshold value, it can be judged that a specific pattern of the training signal was received. Since the position of the specific pattern in the training signal can be known in advance, the frame structure of a received signal can be known so that the start position of the training signal in the next frame can be known.
As the training signal is received and this is detected by the training signal synchronization detector 12, the switches 16-3′ are turned to the contact b side to supply the detection signal to a tap coefficient updating unit 15 to start changing the equalization characteristics in the manner described above.
During the period while the training signal transmitted from the transmission apparatus side is detected on the reception apparatus side, the output signals Ia and Qa of the equalizer 9 are supplied to the adders 17-1 whereas the training signals It and Qt, which are generated by a training signal generator 18, having the same format as the training signals generated on the transmission apparatus side are supplied to the subtraction inputs of the adders 17-1.
The adders 17-1 output equalization error signals Ei and Eq representative of differences between the output signals Ia and Qa of the equalizer 9 and the reference training signals It and Qt. The equalization error signals Ei and Eq outputted from the adders 17-1 are inputted to the tap coefficient updating unit 15 to sequentially update the tap coefficients of the equalizer 9 in accordance with an equalization algorithm using a predetermined least mean sequare method.
These tap coefficients correspond to the coefficients C1 to CN applied to the N multipliers 2022 shown in FIG. 6. The equalized output signals Ia and Qa can be obtained by updating these tap coefficients C1 to CN in accordance with the following equations so as to minimize the equalization error value E:CN(T+1)=CN(T)−g·X*·E                 X*: complex conjugate number of input signal=Ir−j·Qr        E: Ebi+j·Ebq=(Ia−Id)+j·(Qa−Qd)        g: constant (scalar)        CN(T): tap coefficients C1 to CN at time T        CN(T+1): tap coefficients C1 to CN at time T+1        where j is an imaginary part of a complex number.        
An algorithm for setting equalization characteristics is well known in this field of art. The details thereof are disclosed, for example, in Hiroshi Miyakawa et al. “Digital Signal Processing”, The Institute of Electronics and Communication Engineers of Japan, November, 1975, pp. 231-243.
A process of updating the tap coefficient values by the tap coefficient updating unit 15 is repetitively executed at a period of 1/modulation rate, that is symbol rate, so that the equalization errors Ei and Eq are gradually reduced and become near zero.
When the equalization errors Ei and Eq become sufficiently small, the optimum equalization characteristics can be obtained so that a signal received at the reception apparatus side can be equalized by the equalizer 9 to eliminate the influence of waveform distortions and the like which may be generated depending upon the transmission path condition, and data without errors can be reproduced.
After the optimum equalization characteristics are obtained on the reception apparatus side, the switches 16-3′ are turned back to the contact a side to perform the transmission operation of a data signal. However, the transmission apparatus side has no means for knowing the completion of setting the equalization characteristics on the reception apparatus side.
Conventionally, the time taken for the reception apparatus side to set the equalization characteristics by using the training signal has been detected. After the lapse of this estimated time after the training signal was transmitted, the signal is stopped and the transmission operation of a data signal starts.
When the training signal is stopped, this is detected by the training signal synchronization detector 12. At this timing, the switches 16-3 are turned back to the contact a side.
Accordingly, the data signals Ia and Qa are thereafter inputted to the identifier 10 and the reception apparatus side moves to a normal data transmission operation wherein serial data signals are outputted from the P/S converter 11.
While the data signal is received during the data transmission process after the equalization characteristics of the equalizer are set, if the transmission path condition changes abruptly because of phase hit, amplitude hit, short break and the like, the equalizer 9 may become out of the equalization condition and may enter a so-called divergence condition.
In such a case, it is difficult to make the equalizer 9 enter the equalization condition by using the data signal without using the training signal. Even if the equalization condition could be recovered by some other means, it takes a very long time.
In such a case, if the data signal is stopped and instead the training signal is transmitted from the transmission apparatus side, the equalizer 9 in the reception apparatus side can be made the equalization condition. However, it is necessary for the transmission apparatus side to detect the divergence condition of the equalizer 9 in the reception apparatus side.
If data transmission is carried out bidirectionally, the divergence condition of the equalizer 9 can be notified from the reception apparatus side to the transmission apparatus side by using some means. However, if data transmission is carried out unidirectionally, this notification is impossible.
To solve this, conventionally, as shown in FIG. 10, the training signals DT and data signals DA are alternately transmitted at a predetermined period irrespective of the condition of the equalizer on the reception apparatus side. Upon reception of the training signal DT, the reception apparatus side executes the equalization setting process for the equalizer by using the training signal DT even if the equalizer is not in the divergence condition.
When the divergence of the equalizer occurs, the reception apparatus side cannot reproduce the data signal correctly, resulting in bit errors.
However, even if the divergence of the equalizer occurs during the data signal transmission, the training signal is always transmitted in a predetermined period. Therefore, upon reception of the next training signal, the equalization process is executed and the equalization condition can be recovered.
Therefore, according to this conventional automatic equalization technique, even if the divergence condition of the equalizer occurs, bit errors of data signals are generated only during the period from the occurrence of the divergence to the completion of setting the equalization characteristics by using the next training signal. After the training signal is received and the equalization condition is recovered, a data signal can be reproduced without errors.
The tap updating operation for making the equalizer enter the equalization condition by using the received training signal is required to be executed the number of symbols of the training signal. Generally, the number of symbols are several tens to several hundreds. One symbol corresponds to a signal at each signal point on the constellation plane of the baseband transmission signal. This symbol is modulated and transmitted at a predetermined period, i.e., a 1/modulation rate period.
However, with the above-described automatic equalization technique, the calculation amount becomes very large because the above-described equations are calculated for each tap and the input signal is represented by a complex number and has both the in-phase and quadrature amplitude components. If the tap coefficient updating is performed by using software, the process time becomes very long and the program itself becomes large, and if the tap coefficient updating is performed by using hardware, the circuit scale becomes very large.